The 5-Second Trick For Anti-Tamper Digital Clocks
The 5-Second Trick For Anti-Tamper Digital Clocks
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seventeen. The equipment for detecting clock tampering as defined in declare 15, wherein the evaluate circuit is brought on by a clock edge at an stop from the clock Appraise time frame.
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33. The apparatus for detecting voltage tampering as described in claim thirty, whereby the usually means for evaluating decides whether or not the quantity of types during the plurality of delayed monotone alerts differs from a h2o stage range by over a predetermined threshold.
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41. The apparatus for detecting voltage tampering as described in assert forty, whereby the h2o stage number is set according to delayed monotone indicators from one or more former Assess time.
A monotone sign is presented through a clock Consider time period connected to a clock. The monotone signal is delayed working with Each individual with the plurality of resettable delay line segments to make a respective plurality of delayed monotone indicators. The clock is used to induce an Examine circuit that takes advantage of the plurality of delayed monotone signals to detect a clock fault.
Disclosed is a method for detecting clock tampering. In the tactic a plurality of resettable hold off line segments are supplied. Resettable delay line segments among a resettable delay line section connected to a least hold off time and a resettable delay line segment related to a greatest delay time are Each and every associated with discretely growing hold off occasions.
38. The equipment for detecting voltage tampering as outlined in declare 37, wherein the resettable delay line segments are reset throughout a reset time frame, wherein the reset time frame is before the Assess period of time.
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